Example Of A Cpu 224 V Memory And I/O Address Area Of A Profibus-Dp Master - Siemens SIMATIC S7-200 System Manual

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Figure A-29 shows a memory model of the V memory in a CPU 224 and the I/O

address areas of a DP master CPU. In this example, the DP master has defined

an I/O configuration of 16 output bytes and 16 input bytes, and a V memory offset

of 5000. The output buffer and input buffer lengths in the CPU 224 (determined

from the I/O configuration) are both 16 bytes long. The output data buffer starts at

V5000; the input buffer immediately follows the output buffer and begins at V5016.

The output data (from the master) is placed in V memory at V5000. The input data

(to the master) is taken from the V memory at V5016.

If you are working with a data unit (consistent data) of three bytes or data units

(consistent data) greater than four bytes, you must use SFC14 to read the inputs

of the DP slave and SFC15 to address the outputs of the DP slave. For more

information, see the S ystem Software for S7-300 and S7-400 System and

Standard Functions Reference Manual .

S7-200 Programmable Controller System Manual

A5E00066097-02

Output buffer

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Input buffer

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VB: variable memory byte

Example of a CPU 224 V Memory and I/O Address Area of a PROFIBUS-DP

I/O input area:

I/O output area:

P: peripheral

PI: peripheral input

PQ: peripheral output

S7-200 Specifications

CPU 315-2 DP

I/O address areas

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