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Table 13. POST PCI event/error SEL format
Byte
15
16
POST processor event/error SEL format
Table 14. POST processor event/error SEL format
Byte
4
5
6
7
8
9
10
11
12
13
14
15
16
Reserved
Revision Number = 0x00
0x01 POST Processor Event / Error
Error Type
0x00 Processor Failed BIST
0x01 Unable to Apply Microcode (Patch) Update
0x02 POST Does Not Support Current Stepping of Processor
Chassis Number (0x00 if not applicable)
Processor Number
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Revision Number = 0x00
Description
Description
89
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