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IBM DTLA-305040 - Deskstar 41.1 GB Hard Drive Specifications
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IBM DTLA-305040 - Deskstar 41.1 GB Hard Drive Specifications

3.5 inch ultra ata/100 hard disk drive
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IBM storage products - official published specifications

Hard disk drive specifications

Deskstar 40GV & 75GXP
3.5 inch Ultra ATA/100 hard disk drive
Models:
DTLA-305010
DTLA-305020
DTLA-305030
DTLA-305040
Revision 2.0
DTLA-307015
DTLA-307020
DTLA-307030
DTLA-307045
DTLA-307060
DTLA-307075
S07-4778-04

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Summary of Contents for IBM DTLA-305040 - Deskstar 41.1 GB Hard Drive

  • Page 1: Hard Disk Drive Specifications

    IBM storage products - official published specifications Hard disk drive specifications Deskstar 40GV & 75GXP 3.5 inch Ultra ATA/100 hard disk drive Models: DTLA-305010 DTLA-307015 DTLA-305020 DTLA-307020 DTLA-305030 DTLA-307030 DTLA-305040 DTLA-307045 DTLA-307060 DTLA-307075 Revision 2.0 S07-4778-04...
  • Page 2 IBM may have patents or pending patent applications covering subject matter in this document. The furnishing of this document does not give you any license to these patents. You can send license inquiries in writing to the IBM Director of Commercial Relations, IBM Corporation, Armonk, NY 10577.

  • Page 3: Table Of Contents

    Table of contents Figures ............... . . 1.0 General .
  • Page 4 7.4 Environment ..............7.4.1 Temperature and humidity .
  • Page 5 9.11 Sector Count Register ............9.12 Sector Number Register .
  • Page 6 12.3 Flush Cache (E7h) ............12.4 Format Track (50h) .
  • Page 7 12.33 Standby (E2h/96h) ............12.34 Standby Immediate (E0h/94h) .
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  • Page 9: Figures

    Figures Figure 1. Default logical drive parameters ..........Figure 2.

  • Page 10: Dtla

    Figure 49. Limits of temperature and humidity ........Figure 50.
  • Page 11 Figure 92. Identify Device Information (6 of 6) ........Figure 93.
  • Page 12 Figure 145. Write Multiple Command (C5h) ......... Figure 146.

  • Page 13: General

    1.0 General This document describes the specifications of the following IBM 3.5-inch ATA interface hard disk drives: Ÿ DTLA-305010 (10.2 GB) (5400 RPM) Ÿ DTLA-305020 (20.5 GB) (5400 RPM) Ÿ DTLA-305030 (30.7 GB) (5400 RPM) Ÿ DTLA-305040 (41.1 GB) (5400 RPM) Ÿ...

  • Page 14: General Caution

    1.2 General caution The drive can be damaged by shock or ESD (Electrostatic Discharge). Any damage sustained by the drive after removal from the shipping package and opening the ESD protective bag are the responsibility of the user. 1.3 References Ÿ...

  • Page 15: General Features

    2.0 General features Ÿ Data capacities of 10.2 GB - 76.8 GB Ÿ Spindle speeds of 5400 RPM (DTLA-305xxx) and 7200 RPM (DTLA-307xxx) Ÿ Enhanced IDE (Ultra ATA100) interface Ÿ Sector format of 512 bytes/sector Ÿ Closed-loop actuator servo Ÿ Automatic Actuator lock Ÿ...
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  • Page 17: Part 1. Functional Specification

    Part 1. Functional specification Deskstar 40GV & 75GXP hard disk drive specifications...
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  • Page 19: Fixed Disk Subsystem Description

    3.0 Fixed disk subsystem description 3.1 Control Electronics The drive is electronically controlled by a microprocessor, several logic modules, digital/analog modules, and various drivers and receivers. The control electronics performs the following major functions: Ÿ Controls and interprets all interface signals between the host controller and the drive. Ÿ...
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  • Page 21: Drive Characteristics

    4.0 Drive characteristics This chapter describes the characteristics of the drive. 4.1 Default logical drive parameters The default of the logical drive parameters in Identify Device data are as shown below. Capacity Word 3 Word 6 Word 60-61 Customer Usable Model Word 1 (Cyl) (GB)

  • Page 22: Data Sheet

    4.3 Drive organization 4.3.1 Drive format Upon shipment from IBM manufacturing the drive satisfies the sector continuity in the physical format by means of the defect flagging strategy described in section 5.0 in order to provide the maximum perform- ance to users.

  • Page 23: Cylinder Allocation

    4.3.2 Cylinder allocation DTLA-305XXX DTLA-307XXX Physical Cylinders Sectors/Track Physical Cylinders Sectors/Track Data Zone 0 0–623 0–1375 Data Zone 1 624–2047 1376–2831 Data Zone 2 2048–3727 2832–4239 Data Zone 3 3728–5343 4240–6975 Data Zone 4 5344–8095 6976–9759 Data Zone 5 8096–10975 9760–11551 Data Zone 6 10976–12879...

  • Page 24: Command Overhead

    4.4.1 Command overhead Command overhead is defined as the time required Ÿ from the time the command is written into the command register by a host Ÿ to the assertion of DRQ for the first data byte of a READ command when the requested data is not in the buffer Ÿ...

  • Page 25: Figure 6. Full Stroke Seek Time

    Seek time is measured from the start of the motion of the actuator to the start of a reliable read or write operation. “Reliable read or write” implies that error correction/recovery is not used to correct arrival problems. The average seek time is measured as the weighted average of all possible seek combi- nations.

  • Page 26: Drive Ready Time

    4.4.2.4 Cylinder switch time (Cylinder skew) Cylinder switch time Typical (ms) DTLA-305XXX DTLA-307XXX Figure 8. Cylinder Skew A cylinder switch time is defined as the amount of time required by the fixed disk to access the next sequential block after reading the last sector in the current cylinder. The measuring method is given in 4.4.6, “Throughput”...

  • Page 27: Data Transfer Speed

    4.4.4 Data transfer speed DTLA-305XXX DTLA-307XXX Data transfer speed (Mbyte/sec) (Mbyte/sec) Disk-Buffer transfer (Zone 0) Instantaneous - typical 36.5 43.4 Sustained - typical 31.8 37.7 Disk-Buffer transfer (Zone 14) Instantaneous - typical 17.0 21.7 Sustained - read typical 14.8 18.8 Sustained - write typical 14.8 18.8...

  • Page 28: Throughput

    4.4.6 Throughput 4.4.6.1 Simple sequential access Sequential Typical (sec) Max (sec) read DTLA-305XXX DTLA-307XXX DTLA-305XXX DTLA-307XXX Zone 0 0.57 0.48 0.60 0.50 Zone 14 1.20 0.95 1.26 1.00 Figure 13. Simple Sequential Access performance The above table gives the time required to read/write for a total of 8000x consecutive blocks (16,777,216 bytes) accessed by 128 read commands.

  • Page 29: Operating Modes

    4.4.7 Operating modes 4.4.7.1 Operating mode descriptions Operating mode Description Spin-up Start up time period from spindle stop or power down Seek Seek operation mode Write Write operation mode Read Read operation mode Idle Spindle motor and servo system are working normally. Commands can be received and processed immediately.
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  • Page 31: Defect Flagging Strategy

    5.0 Defect flagging strategy Media defects are remapped to the next available sector during the Format Process in manufacturing. The mapping from LBA to the physical locations is calculated by an internally maintained table. Shipped format Ÿ Data areas are optimally used. Ÿ...
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  • Page 33: Data Integrity

    6.0 Data integrity 6.1 Data loss at Power off Ÿ The drive retains recorded information under all non-write operations. Ÿ No more than one sector can be lost by power down during write operation while write cache is dis- abled. Ÿ...
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  • Page 35: Specification

    7.0 Specification 7.1 Electrical interface 7.1.1 Connectors 7.1.1.1 DC power connector The DC power connector is designed to mate with AMP (part 1-480424-0) using AMP pins part 350078-4 (strip) or part 61173-4 (loose piece) or their equivalents. Pin assignments are shown in the figure below. Voltage +12 V Figure 17.

  • Page 36: Signal Definition

    7.1.2 Signal definition The pin assignments of interface signals are listed in the figure below: SIGNAL Type SIGNAL Type RESET- 3-state 3-state 3-state 3-state 3-state DD10 3-state 3-state DD11 3-state 3-state DD12 3-state 3-state DD13 3-state 3-state DD14 3-state 3-state DD15 3-state (20)
  • Page 37 DD0-DD15 16-bit bi-directional data bus between the host and the drive. The lower 8 lines, DD00-07, are used for Register and ECC access. All 16 lines, DD00-15, are used for data transfer. These are 3-State lines with 24 mA current sink capability. DA0-DA2 Address used to select the individual register in the drive.
  • Page 38 If DASP- was not asserted by device 1 during reset initialization, device 0 shall post its own status immediately after it completes diagnostics and clear the device 1 Status register to 00h. Device 0 may be unable to accept commands until it has finished its reset procedure and is ready (DRDY=1).

  • Page 39: Interface Logic Signal Levels

    DDMARDY- is a flow control signal for Ultra DMA data out bursts. This signal is held asserted by the device to indicate to the host that the device is ready to receive Ultra DMA data out transfers. The device may negate DDMARDY- to pause an Ultra DMA data out transfer.

  • Page 40: Signal Timings

    7.2 Signal timings 7.2.1 Reset timings Drive reset timing. RESET- BUSY Figure 20. System reset timing chart PARAMETER DESCRIPTION Min (usec) Max (sec) RESET low width RESET high to not BUSY – Figure 21. System reset timing Deskstar 40GV & 75GXP hard disk drive specifications...

  • Page 41: Pio Timings

    7.2.2 PIO timings The PIO cycle timings meet Mode 4 of the ATA/ATAPI-4 description. CS0-,CS1- DA0-2 DIOR-, DIOW- Write data DD0-15 Read data DD0-15 t7(*) t8(*) IOCS16-(*) IORDY (*) Up to ATA-2 (mode-0,1,2) Figure 22. PIO cycle time chart PARAMETER DESCRIPTION MIN (ns) MAX (ns) Cycle time...

  • Page 42: Write Drq Interval Time

    7.2.2.1 Write DRQ interval time For write sectors and write multiple operations 3.8 us is inserted from the end of negation of the DRQ bit until setting of the next DRQ bit. 7.2.2.2 Read DRQ interval time For read sectors and read multiple operations the interval from the end of negation of the DRQ bit until setting of the next DRQ bit is as follows: Ÿ...

  • Page 43: Multiword Dma Timings

    7.2.3 Multiword DMA timings The Multiword DMA timing meets Mode 2 of the ATA/ATAPI-4 description. CS0-/CS1- DMARQ DMACK- DIOR-/DIOW- READ DATA WRITE DATA Figure 24. Multiword DMA cycle timing chart PARAMETER DESCRIPTION MIN (ns) MAX (ns) Cycle time – DIOR–, DIOW– pulse width –...

  • Page 44: Ultra Dma Timings

    7.2.4 Ultra DMA timings The Ultra DMA timing meets Mode 0,1,2,3 4, and 5 of the Ultra DMA Protocol. 7.2.4.1 Initiating Read DMA DMARQ DMACK- tACK tENV STOP tACK tENV t2CYC HDMARDY- tCYC tCYC tZIORDY DSTROBE tDVH tZAD tDVS DD(15:00) xxxxxxxxxxxxxxxxxxxxxxxxx RD Data RD Data...

  • Page 45: Figure 28. Ultra Dma Cycle Timing Chart (Host Pausing Read)

    7.2.4.2 Host Pausing Read DMA DMARQ DMACK- STOP HDMARDY- tRFS DSTROBE Figure 28. Ultra DMA cycle timing chart (Host pausing Read) MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 PARAMETER DESCRIPTION (all values in ns) Strobe to ready response time – – –...

  • Page 46: Figure 30. Ultra Dma Cycle Timing Chart (Host Terminating Read)

    7.2.4.3 Host Terminating Read DMA DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tRFS tIORDYZ DSTROBE DD(15:00) xxxxxxxxxxxxxxxxxx xxxxxxxxxx xxx RD Data tZAH Host drives DD Device drives Figure 30. Ultra DMA cycle timing chart (Host terminating Read) MODE0 MODE1 MODE2 MODE3 MODE4 MODE5...

  • Page 47: Figure 32. Ultra Dma Cycle Timing Chart (Device Terminating Read)

    7.2.4.4 Device Terminating Read DMA DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tIORDYZ DSTROBE DD(15:00) xxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxx Tzah Device drives Host drives DD Figure 32. Ultra DMA cycle timing chart (Device terminating Read) MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 PARAMETER DESCRIPTION (all values in ns) Time from strobe to stop...

  • Page 48: Figure 34. Ultra Dma Cycle Timing Chart (Initiating Write)

    7.2.4.5 Initiating Write DMA DMARQ DMACK- tACK tENV STOP tZIORDY t2CYC HDMARDY- tACK tCYC tCYC DSTROBE DD(15:00) xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx WT Data WT Data WT Data Host drives DD Figure 34. Ultra DMA cycle timing chart (Initiating Write) MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 PARAMETER DESCRIPTION...

  • Page 49: Figure 36. Ultra Dma Cycle Timing Chart (Device Pausing Write)

    7.2.4.6 Device Pausing Write DMA DMARQ DMACK- STOP DDMARDY- tRFS HSTROBE Figure 36. Ultra DMA cycle timing chart (Device Pausing Write) MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 PARAMETER DESCRIPTION (all values in ns) Strobe to ready response time – – –...

  • Page 50: Figure 38. Ultra Dma Cycle Timing Chart (Device Terminating Write)

    7.2.4.7 Device Terminating Write DMA DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK tRFS HSTROBE DD(15:00) xxx WT Data xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx Host drives DD Figure 38. Ultra DMA cycle timing chart (Device Terminating Write) MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 PARAMETER DESCRIPTION (all values in ns) tRFS...

  • Page 51: Figure 40. Ultra Dma Cycle Timing Chart (Host Terminating Write)

    7.2.4.8 Host Terminating Write DMA DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK HSTROBE DD(15:00) xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx Host drives DD Figure 40. Ultra DMA cycle timing chart (Host Terminating Write) MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 PARAMETER DESCRIPTION (all values in ns) Time from strobe to stop –...

  • Page 52: Addressing Of Registers

    7.2.5 Addressing of registers The host addresses the drive through a set of registers called the Task File. These registers are mapped into the I/ O space of the host. Two chip select lines (CS0– and CS1–) and three address lines (DA0-02) are used to select one of these registers, while a DIOR–...

  • Page 53: Jumper Settings

    7.3 Jumper settings 7.3.1 Jumper pin assignment There are four jumper settings as shown in the following sections: 16 logical heads (normal use), 15 logical heads, 2GB clip, and auto spin disable. Each category is exclusive. The pin assignment of the 9-pin jumper used to select "Device 0"...

  • Page 54: Jumper Positions

    7.3.2 Jumper positions 7.3.2.1 16 logical head default (normal use) The figure below shows the jumper positions used to select Device 0, Device 1, Cable Selection, or Device 0 Forcing Device 1 Present. DEVICE 0 (Master) SHIPPING DEFAULT DEVICE 1 (Slave) CABLE SEL DEVICE 0 FORCING...

  • Page 55: Figure 45. Jumper Positions For 15 Logical Head Default

    7.3.2.2 15 logical head default The positions of jumper blocks shown below is used to select Device 0, Device 1, Cable Selection, or Device 0 Forcing Device 1 Present, setting 15 logical heads instead of default 16 logical head models. DEVICE 0 (Master) DEVICE 1...

  • Page 56: Figure 46. Jumper Positions For Capacity Clip To 2Gb/32Gb With 16 Default Logical Heads

    7.3.2.3 Capacity clip to 2GB/32GB with 16 default logical heads The positions of the jumper blocks shown below are used to select Device 0, Device 1, Cable Selection, or Device 0 Forcing Device 1 Present, setting the drive capacity down either to 2GB or 32GB for the pur- pose of compatibility.

  • Page 57: Figure 47. Jumper Settings For Disabling Auto Spin

    7.3.2.4 Power up in standby The jumpers are installed as shown below for enabling power up in standby. DEVICE 0 (Master) DEVICE 1 (Slave) CABLE SEL DEVICE 0 FORCING DEVICE 1 PRESENT Figure 47. Jumper settings for Disabling Auto Spin Notes: 1.

  • Page 58: Environment

    7.4 Environment 7.4.1 Temperature and humidity Operating conditions Temperature 5 to 55°C Relative humidity 8 to 90% non-condensing Maximum wet bulb temperature 29.4°C non-condensing Maximum temperature gradient 15°C/Hour Altitude -300 to 3,048 m Nonoperating conditions Temperature -40 to 65°C Relative humidity 5 to 95% non-condensing Maximum wet bulb temperature 35°C non-condensing...

  • Page 59: Figure 49. Limits Of Temperature And Humidity

    Environment Specification 36C/95% 31C/90% Wet Bulb 35C Wet Bulb 29.4C Nonoperating Operating 65C/14% 55C/15% Temperature (C) Figure 49. Limits of temperature and humidity Deskstar 40GV & 75GXP hard disk drive specifications...

  • Page 60: Dc Power Requirements

    7.5 DC power requirements The following voltage specifications apply at the drive power connector. Damage to the drive electronics may result if the power supply cable is connected or disconnected while power is being applied to the drive (no hot plug/unplug is allowed). Connections to the drive should be made in a low voltage, isolated secondary circuit(SELV).

  • Page 61: Figure 51. Power Supply Current (2 Of 2)

    DTLA-307015, -307020, -307030 , -307045 +5 Volts +12 Volts Total (amps RMS) (amps RMS) (watts) Idle Average 0.24 0.46 Idle ripple (peak-to-peak) 0.33 0.41 Seek peak 0.46 2.04 0.26 0.73 10.2 Seek average Start up (max) 0.81 1.90 Random R/W peak 1.01 2.04 0.41...

  • Page 62: Power Supply Generated Ripple At Drive Power Connector

    7.5.3 Power supply generated ripple at drive power connector Maximum (mV pp) +5V DC 0-10 +12V DC 0-10 Figure 52. Power supply generated ripple at drive power connector During drive start up and seeking 12-volt ripple is generated by the drive (referred to as dynamic loading). If the power of several drives is daisy chained together, the power supply ripple plus the dynamic loading of the other drives must remain within the above regulation tolerance.

  • Page 63: Figure 54. Typical Current Form Of 12V At Start Up Of Dtla-307015/307020/307030/307045

    7.5.4.2 DTLA-307015/307020/307030/307045 Figure 54. Typical Current Form of 12V at Start Up of DTLA-307015/307020/307030/307045 7.5.4.3 DTLA-307060/307075 Figure 55. Typical Current Form of 12V at Start Up of DTLA-307060/307075 Deskstar 40GV & 75GXP hard disk drive specifications...

  • Page 64: Energy Consumption Efficiency

    7.5.5 Energy consumption efficiency Energy consumption DTLA- efficiency (W/GB) 305020 0.24 305030 0.16 305040 0.12 307015 0.43 307020 0.33 307030 0.22 307045 0.15 307060 0.13 307075 0.11 Figure 56. Energy consumption efficiency Energy consumption efficiency is calculated as Power consumption of Idle Average (Watt)/Capacity(GB) Deskstar 40GV &...

  • Page 65: Reliability

    7.6 Reliability 7.6.1 Cable noise interference To avoid any degradation of performance throughput or error rate when the interface cable is routed on top or comes in contact with the HDA assembly, the drive must be grounded electrically to the system frame by four screws.

  • Page 66: Mechanical Specifications

    7.7 Mechanical specifications 7.7.1 Outline 101.6 ±0.4 25.4 ±0.4 BREATHER HOLE (*) Dia.2.0±0.1 19.7 ±0.4 LEFT FRONT * DO NOT BLOCK THE BREATHER HOLE . Figure 57. Outline of the DTLA-3xxxxx Deskstar 40GV & 75GXP hard disk drive specifications...

  • Page 67: Physical Dimensions

    7.7.2 Physical dimensions The following chart describes the dimensions for IBM DTLA-307xxx hard disk drive form factor. DTLA- Height (mm) Width (mm) Length (mm) Weight (grams) 305010 305020 305030 305040 307015 25.4 ± 0.4 101.6 ± 0.4 146.0 ± 0.8...

  • Page 68: Hole Locations

    7.7.3 Hole locations The figure below shows the outline of the drive including the hole locations. (6X) 6-32 UNC (4X) 6-32 UNC (2X) 95.25 ±0.2 (6X) 6.35 ±0.2 REAR RIGHT Recommended torque 0.6 - 1.0 Nm Max allowable penetration of noted screw to be 4.5 mm.

  • Page 69: Connector Locations

    7.7.4 Connector locations Figure 60. Connector locations 7.7.5 Drive mounting The drive will operate in all axes (6 directions). Performance and error rate will stay within specification limits if the drive is operated in the other orientations from which it was formatted. For reliable operation, the drive must be mounted in the system securely enough to prevent excessive motion or vibration of the drive during seek operation or spindle rotation, using appropriate screws or equivalent mounting hardware.

  • Page 70: Vibration And Shock

    7.8 Vibration and shock All vibration and shock measurements recorded in this section are made with a drive that has no mounting attachments for the systems. The input power for the measurements is applied to the normal drive mounting points. 7.8.1 Operating vibration 7.8.1.1 Random vibration The drive is designed to operate without unrecoverable errors while being subjected to the following...

  • Page 71: Operating Shock

    7.8.2.1 Random vibration The test consists of a random vibration applied for each of three mutually perpendicular axes with the time duration of 10 minutes per axis. The PSD levels for the test simulate the shipping and relocation environment shown below. The overall RMS (Root Mean Square) level of vibration is 1.04G.

  • Page 72: Rotational Shock

    7.8.4.2 Sinusoidal shock wave The shape is approximately half-sine pulse. The figure below shows the maximum acceleration level and duration: Models Accleration level (G) Duration (ms) DTLA-305XXX DTLA-307015, -307020, -307030, -307045 DTLA-307060, -307075 All models Figure 63. Sinusoidal shock wave 7.8.5 Rotational shock All shock inputs shall be applied around the actuator pivot axis.

  • Page 73: Acoustics

    7.9 Acoustics The upper limit criteria of the octave sound power levels are given in Bels relative to one pico watt and are shown in the following table. The sound power emission levels are measured in accordance with ISO 7779. DTLA-305010/305020/ DTLA-307015/307020/ DTLA-307060/307075...

  • Page 74: Identification Labels

    The following labels are affixed to every drive shipped from the drive manufacturing location in accord- ance with the appropriate hard disk drive assembly drawing: • A label containing the IBM logo, the IBM part number, and the statement “Made by IBM Japan Ltd.”, or IBM approved equivalent.

  • Page 75: Electromagnetic Compatibility

    The product is declared to be in conformity with requirements of the following EC directives under the sole responsibility of IBM United Kingdom Ltd. or Yamato Lab, IBM Japan Ltd. Council Directive 89/336/EEC on the approximation of laws of the Member States relating to electro- magnetic compatibility.
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  • Page 77: Part 2. Interface Specification

    Part 2. Interface specification Deskstar 40GV & 75GXP hard disk drive specifications...
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  • Page 79: General

    8.0 General This specification describes the host interface of the DTLA-30XXXX. The interface conforms to the Working Document of Information Technology - AT Attachment with Packet Interface Extension (ATA/ATAPI-5), Revision 2, dated 13 December 1999, with certain limitations described in 8.2, “Deviations from standard.” 8.1 Terminology Device The DTLA-30XXXX hard disk drive...
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  • Page 81: Registers

    9.0 Registers Addresses Functions CS0– CS1– READ (DIOR–) WRITE (DIOW–) Data bus high impedance Not used Control block registers Data bus high impedance Not used Data bus high impedance Not used Alternate Status Device Control Device Address Not used Command block registers Data Data Error Register...

  • Page 82: Alternate Status Register

    9.1 Alternate Status Register Alternate Status Register DSC/ SERV Figure 67. Alternate Status Register This register contains the same information as the Status Register. The only difference is that reading this register does not imply interrupt acknowledge or clear a pending interrupt. See 9.13, “Status Register”...

  • Page 83: Data Register

    9.5 Data Register This register is used to transfer data blocks between the device data buffer and the host. It is also the register through which sector information is transferred on a Format Track command and configuration information is transferred on an Identify Device command. All data transfers are 16 bits wide, except for ECC byte transfers, which are 8 bits wide.

  • Page 84: Device/Head Register

    -H3,-H2,-H1,-H0 -Head Select. These four bits are the 1's complement of the binary coded address of the currently selected head. -H0 is the least significant. -DS1 -Drive Select 1. Drive select bit for device 1, active low. DS1=0 when device 1 (slave) is selected and active.

  • Page 85: Features Register

    At the completion of any command except Execute Device Diagnostic the contents of this register are always valid even if ERR=0 is in the Status Register. Following a power on, a reset, or completion of an Execute Device Diagnostic command, this register contains a diagnostic code.

  • Page 86: Status Register

    9.13 Status Register Status Register DSC/ DRDY CORR SERV Figure 72. Status Register This register contains the device status. The contents of this register are updated whenever an error occurs and at the completion of each command. If the host reads this register when an interrupt is pending, it is considered to be the interrupt acknow- ledge.

  • Page 87: General Operation

    10.0 General operation 10.1 Reset response There are three types of resets in ATA: Power On Reset (POR) The device executes a series of electrical circuitry diagnostics, spins up the HDA, tests speed, and other mechanical parametrics, and sets default values. Hard Reset (Hardware Reset) RESET- signal is negated in ATA Bus.

  • Page 88: Register Initialization

    10.1.1 Register initialization Register Default Value Error Diagnostic Code Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status Alternate Status Figure 74. Default Register Values After power on, hard reset, or software reset, the register values are initialized as shown in the figure below.

  • Page 89: Diagnostic And Reset Considerations

    10.2 Diagnostic and reset considerations For each Reset and Execute Device Diagnostic the diagnostic is done as follows: Power On Reset DASP- is read by Device 0 to determine if Device 1 is present. If Device 1 is present, Device 0 shall read PDIAG- to determine when it is valid to clear the BSY bit and whether Device 1 has powered on or reset without error.

  • Page 90: Sector Addressing Mode

    10.3 Sector Addressing Mode All addressing of data sectors recorded on the drive media is by a logical sector address. The logical CHS address for the drive is different from the actual physical CHS location of the data sector on the disk media.

  • Page 91: Overlapped And Queued Feature

    10.4 Overlapped and queued feature Overlap allows devices to perform a bus release so that the other device on the bus may be used. To perform a bus release the device clears both DRQ and BSY to zero. When selecting the other device during overlapped operations, the host shall disable interrupts via the nIEN bit on the currently selected device before writing the Device/Head register to select the other device.

  • Page 92: Power Management Feature

    10.5 Power management feature The power management feature functions permit a host to reduce the power required to operate the drive. It provides a set of commands and a timer that enables a device to implement low power consumption modes. The drive implements the following set of functions: Ÿ...

  • Page 93: Interface Capability For Power Modes

    10.5.4 Interface capability for power modes Each power mode affects the physical interface as defined in the following table. Interface Mode Media active Active Active Idle Active Standby Inactive Sleep Inactive Figure 77. Power conditions Ready (RDY) is not a power condition. A device may post ready at the interface even though the media may not be accessible.

  • Page 94: Threshold Exceeded Condition

    10.6.4 Threshold Exceeded Condition If one or more attribute values, whose Pre-failure bit of their status flag is set, are less than or equal to their corresponding attribute thresholds, then the device reliability status is negative, indicating an impending degrading or faulty condition. 10.6.5 S.M.A.R.T.

  • Page 95: Security Mode Feature Set

    10.7 Security Mode Feature Set Security Mode Feature Set is a powerful security feature. With a device lock password, a user can pre- vent unauthorized access to a hard disk drive even if the device is removed from the computer. The following commands are supported for this feature: Security Set Password ('F1'h)

  • Page 96: Operation Example

    The system manufacturer or dealer who intends to enable the device lock function for end-users must set the master password even if only single level password protection is required. 10.7.4 Operation example 10.7.4.1 Master Password setting The system manufacturer or dealer can set a new Master Password from default Master Password using the Security Set Password command without enabling the Device Lock Function.

  • Page 97: Figure 79. Usual Operation

    10.7.4.3 Operation from POR after User Password is set When Device Lock Function is enabled, the device rejects media access command until a Security Unlock command is successfully completed. Device Locked mode Unlock CMD Erase Prepare Media Access Non-media access Command (*1) Command (*1) Erase Unit...

  • Page 98: Figure 80. Password Lost

    10.7.4.4 User Password Lost If the User Password is forgotten and High level security is set, the system user cannot access any data. However the device can be unlocked using the Master Password. If a system user forgets the User Password and Maximum security level is set, data access is impossible. However the device can be unlocked using the Security Erase Unit command to unlock the device and erase all user data with the Master Password.

  • Page 99: Command Table

    10.7.5 Command table This table shows the response of the device to commands when the Security Mode Feature Set (Device lock function) is enabled. Command Locked Mode Unlocked Mode Frozen Mode Check Power Mode Executable Executable Executable Execute Device Diagnostic Executable Executable Executable...

  • Page 100: Figure 81. Command Table For Device Lock Operation (Part 2 Of 2)

    Command Locked Mode Unlocked Mode Frozen Mode Standby Immediate Executable Executable Executable Write Buffer Executable Executable Executable Write DMA (w/o retry) Command aborted Executable Executable Write DMA (w/retry) Command aborted Executable Executable Write DMA Queued Command aborted Executable Executable Write Long (w/o retry) Command aborted Executable Executable...

  • Page 101: Host Protected Area Function

    10.8 Host Protected Area Function The Host Protected Area Function provides a protected area which cannot be accessed via conventional methods. This protected area is used to contain critical system data such as BIOS or system manage- ment information. The contents of the main memory of the entire system may also be dumped into the protected area to resume after system power off.

  • Page 102: Security Extensions

    4. Advanced usage using protected area The data in the protected area is accessed by the following method: Issue Read Native Max Address command to get the real device maximum LBA. Returned value shows that native device maximum LBA is 12,692,735 (C1ACFFh) regardless of the current setting.

  • Page 103: Seek Overlap

    10.9 Seek Overlap The DTLA-3xxxxx provides an accurate seek time measurement method. The seek command is usually used to measure the device seek time by accumulating the execution time for a number of seek com- mands. With typical implementation of seek command this measurement must include the device and host command overhead.

  • Page 104: Reassign Function

    10.11 Reassign Function Reassign Function is used with read commands and write commands. The sectors of data for reassign- ment are prepared as the spare data sector. This reassignment information is registered internally and the information is available right after complet- ing the reassign function.

  • Page 105: Advanced Power Management Feature Set (Apm)

    The IDENTIFY DEVICE information indicates the states as follows: Ÿ identify device information is complete or incomplete Ÿ this feature set is implemented Ÿ this feature set is enabled or disabled Ÿ the device needs the Set Features command to spin-up into active state 10.13 Advanced Power Management feature set (APM) This feature allows the host to select an advanced power management level.

  • Page 106: Address Offset Feature

    3. Automatic Acoustic Management is enabled and the associated algorithm indicates that the Standby mode should be entered to reduce acoustical emanations. The IDENTIFY DEVICE response word 83, bit 9 indicates that Automatic Acoustic Management feature is supported if set. Word 86, bit 9 indicates that Automatic Acoustic Management is enabled if set. Word 94, bits 7-0 contain the current Automatic Acoustic Management level if Automatic Acoustic Management is enabled, and bits 8-15 contain the Vendor's recommended AAM level.

  • Page 107: Identify Device Data

    Before Enable Address Offset Mode A reserved area has been created using a non-volatile Set Max command. Non-Accessible Accessible (Sytem reserved (User Area) area) LBA 0 LBA R LBA M After Enable Address Offset Mode Accessible Non-Accessible (System reserved (User area) area) LBA 0 LBA M–R...
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  • Page 109: Command Protocol

    11.0 Command Protocol The commands are grouped into different classes according to the protocols followed for command exe- cution. The command classes with their associated protocols are defined below. For all commands, the host must first check if BSY=1, and should proceed no further unless and until BSY=0.
  • Page 110 e. The host reads one sector of data via the Data Register. f. The device sets DRQ=0 after the sector has been transferred to the host. 4. For the Read Long command a. The device sets BSY=1 and prepares for data transfer. b.

  • Page 111: Pio Data Out Commands

    11.2 PIO Data Out commands These commands are: Ÿ Format Track Ÿ Security Disable Password Ÿ Security Erase Unit Ÿ Security Set Password Ÿ Security Unlock Ÿ Set Max Set Password command Ÿ Set Max Unlock command Ÿ SMART Write Log Sector Ÿ...
  • Page 112 The Write Multiple command transfers one block of data for each interrupt. The other commands transfer one sector of data for each interrupt. If the device detects an invalid parameter, it will abort the command by setting BSY=0, ERR=1, ABT=1, and interrupting the host.

  • Page 113: Non-Data Commands

    11.3 Non-data commands Non-data commands are Ÿ Check Power Mode Ÿ Execute Device Diagnostic Ÿ Flush Cache Ÿ Idle Ÿ Idle Immediate Ÿ Initialize Device Parameters Ÿ NOP Ÿ Read Native Max Address Ÿ Read Verify Sectors Ÿ Recalibrate Ÿ Security Erase Prepare Ÿ...

  • Page 114: Dma Commands

    11.4 DMA commands DMA commands are Ÿ Read DMA Ÿ Write DMA Data transfers using DMA commands differ in two ways from PIO transfers: Ÿ data transfers are performed using the slave DMA channel Ÿ no intermediate sector interrupts are issued on multisector commands Initiation of the DMA transfer commands is identical to the Read Sector or Write Sector commands except that the host initializes the slave-DMA channel prior to issuing the command.

  • Page 115: Dma Queued Commands

    11.5 DMA queued commands These commands are Ÿ Read DMA Queued Ÿ Service Ÿ Write DMA Queued 1. Command Issue a. The host writes any required parameters to the Features, Sector Count, Sector Number, Cylinder, and Device/Head registers. b. The host writes command code to the Command Register. c.
  • Page 116 This page intentionally left blank.

  • Page 117: Command Descriptions

    12.0 Command descriptions Pro- Code Binary Code Bit Command tocol (Hex) 7 6 5 4 3 2 1 0 Check Power Mode 1 1 1 0 0 1 0 1 Check Power Mode* 1 0 0 1 1 0 0 0 Execute Device Diagnostic 1 0 0 1 0 0 0 0 Flush Cache...

  • Page 118: Figure 84. Command Set (2 Of 2)

    Pro- Code Binary Code Bit Command tocol (Hex) 7 6 5 4 3 2 1 0 SMART Read Attribute Values 1 0 1 1 0 0 0 0 SMART Read Attribute Thresholds 1 0 1 1 0 0 0 0 SMART Return Status 1 0 1 1 0 0 0 0 SMART Save Attribute Values...

  • Page 119: Figure 85. Command Set (Subcommand)

    Feature Command Command (Subcommand) Register Code (Hex) (Hex) S.M.A.R.T. Function SMART Read Attribute Values SMART Read Attribute Thresholds SMART Enable/Disable Attribute Autosave SMART Save Attribute Values SMART Execute Off-line Data Collection SMART Read Log SMART Write Log SMART Enable Operations SMART Disable Operations SMART Return Status SMART Enable/Disable Automatic Off-line...
  • Page 120 Option Bit. Indicates that the Option Bit of the Sector Count Register should be specified. (This bit is used by Set Max Address command) Valid. Indicates that the bit is part of an output parameter and should be specified. Indicates that the hex character is not used. Indicates that the bit is not used.

  • Page 121: Check Power Mode (E5H/98H)

    12.1 Check Power Mode (E5h/98h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...

  • Page 122: Execute Device Diagnostic (90H)

    12.2 Execute Device Diagnostic (90h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...

  • Page 123: Flush Cache (E7H)

    12.3 Flush Cache (E7h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature - - - - - - - -...

  • Page 124: Format Track (50H)

    12.4 Format Track (50h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature - - - - - - - -...
  • Page 125 Input parameters from the device Sector Number In LBA mode this register specifies current LBA address bits 0-7. (L=1) Cylinder High/Low In LBA mode this register specifies current LBA address bits 8-15 (Low), 16-23 (High) In LBA mode this register specifies current LBA address bits 24-27. (L=1) Error The Error Register.

  • Page 126: Format Unit (F7H)

    12.5 Format Unit (F7h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature 0 0 0 1 0 0 0 1...

  • Page 127: Identify Device (Ech)

    12.6 Identify Device (ECh) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature Error...

  • Page 128: Figure 92. Identify Device Information (1 Of 6)

    The Identify Device command requests the device to transfer configuration information to the host. The device will transfer a sector to the host containing the information described in the figure below. Ÿ The Content field indicates vendor specific use of those parameters. Word Content Description...

  • Page 129: Figure 92. Identify Device Information (2 Of 6)

    Word Content Description 400xH Capabilities, bit assignments: 15-14(=01) Word 50 is valid 13– 1(=0) Reserved Minimum value of Standby timer (=0) less than 5 minutes (=1) equal to or greater than 5 minutes 0200H PIO data transfer cycle timing mode Ÿ...

  • Page 130: Figure 92. Identify Device Information (3 Of 6)

    Word Content Description 00xxH Queue depth 15- 5 Reserved 4- 0 Maximum queue depth 76-79 0000H Reserved 003CH Major version number 15- 0 (=3C)ATA-2, ATA-3, ATA/ATAPI-4 and ATA/ATAPI-5 0015H Minor version number 15- 0 (=15)ATA/ATAPI-5 X3T13 1321D 74EBH Command set supported 15(=0) Reserved 14(=1)

  • Page 131: Figure 92. Identify Device Information (4 Of 6)

    Word Content Description xxxxH Command set/feature enabled Reserved NOP command READ BUFFER command WRITE BUFFER command Reserved Host Protected Area feature set DEVICE RESET command SERVICE interrupt RELEASE interrupt LOOK AHEAD WRITE CACHE PACKET Command feature set Power management feature set Removable feature set Security feature set SMART feature set...

  • Page 132: Figure 92. Identify Device Information (5 Of 6)

    Word Content Description xxxxH Time required for Security Erase Unit completion Time = value * 2 (minutes) 0000H Time required for Enhanced Security Erase completion 0000H Current advanced power management value FFFEH Master Password Revision Code xxxxH Hardware reset result. Bit assignments 15-14 (=01) Word 93 is valid CBLID- status...

  • Page 133: Figure 92. Identify Device Information (6 Of 6)

    Word Content Description xxxxH Current Set Feature Option. Bit assignments 15- 4 Reserve Auto reassign 1= Enable Ÿ Reverting 1= Enable Read Look-ahead 1= Enable Write Cache 1= Enable Ÿ 130-159 xxxxH Reserved 160-254 0000H Reserved xxA5H 15- 8 Checksum. This value is the two's complement of the sum of all bytes in byte 0 through 510 7- 0 (A5) Signature...

  • Page 134: Idle (E3H/97H)

    12.7 Idle (E3h/97h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature - - - - - - - - Error...
  • Page 135 When the automatic power down sequence is enabled, the drive will enter Standby mode automatically if the time-out interval expires with no drive access from the host. The time-out interval will be reinitialized if there is a drive access before the time-out interval expires. Deskstar 40GV &...

  • Page 136: Idle Immediate (E1H/95H)

    12.8 Idle Immediate (E1h/95h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature - - - - - - - -...

  • Page 137: Initialize Device Parameters (91H)

    12.9 Initialize Device Parameters (91h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...

  • Page 138: Nop (00H)

    12.10 NOP (00h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature Error V V V V V V V V...

  • Page 139: Read Buffer (E4H)

    12.11 Read Buffer (E4h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...

  • Page 140: Read Dma (C8H/C9H)

    12.12 Read DMA (C8h/C9h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 141 Cylinder High/Low The cylinder number of the first sector to be transferred. (L=0) In LBA mode this register specifies LBA address bits 8 - 15 (Low) 16 - 23 (High) to be transferred. (L=1) The head number of the first sector to be transferred. (L=0) In LBA mode this register specifies LBA bits 24-27 to be transferred.

  • Page 142: Read Dma Queued (C7H)

    12.13 Read DMA Queued (C7h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...
  • Page 143 Input parameters from the device on bus release Sector Count bits 7 - 3 (Tag) contain the Tag of the command being bus released. bit 2 (REL) is set to one. bit 1 (I/O) is cleared to zero. bit 0 (C/D) is cleared to zero. Sector Number, Cylinder High/low, H n/a.

  • Page 144: Read Long (22H/23H)

    12.14 Read Long (22h/23h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature Error...
  • Page 145 The head number of the sector to be transferred. (L=0) In LBA mode this register contains LBA bits 24-27. (L=1) The retry bit. If set to one, then retries are disabled. Input parameters from the device Sector Count The number of requested sectors not transferred. Sector Number The sector number of the transferred sector.

  • Page 146: Read Multiple (C4H)

    12.15 Read Multiple (C4h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...
  • Page 147 Input parameters from the device Sector Count The number of requested sectors not transferred. This will be zero unless an unrecoverable error occurs. Sector Number The sector number of the last transferred sector. (L=0) In LBA mode this register contains current LBA bits 0 - 7. (L=1) Cylinder High/Low The cylinder number of the last transferred sector.

  • Page 148: Read Native Max Address (F8H)

    12.16 Read Native Max Address (F8h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...

  • Page 149: Read Sectors (20H/21H)

    12.17 Read Sectors (20h/21h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature Error...
  • Page 150 Input parameters from the device Sector Count The number of requested sectors not transferred. This will be zero, unless an unrecoverable error occurs. Sector Number The sector number of the last transferred sector. (L=0) In LBA mode this register contains current LBA bits 0 - 7. (L=1) Cylinder High/Low The cylinder number of the last transferred sector.

  • Page 151: Read Verify Sectors (40H/41H)

    12.18 Read Verify Sectors (40h/41h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...
  • Page 152 Input parameters from the device Sector Count The number of requested sectors not verified. This will be zero, unless an unrecoverable error occurs. Sector Number The sector number of the last transferred sector. (L=0) In LBA mode this register contains current LBA bits 0 - 7. (L=1) Cylinder High/Low The cylinder number of the last transferred sector.

  • Page 153: Recalibrate (1Xh)

    12.19 Recalibrate (1xh) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature - - - - - - - - Error...

  • Page 154: Security Disable Password (F6H)

    12.20 Security Disable Password (F6h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
  • Page 155 Identifier Zero indicates that the device should check the supplied password against the user password stored internally. One indicates that the device should check the given password against the master password stored internally. Deskstar 40GV & 75GXP hard disk drive specifications...

  • Page 156: Security Erase Prepare (F3H)

    12.21 Security Erase Prepare (F3h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature - - - - - - - -...

  • Page 157: Security Erase Unit (F4H)

    12.22 Security Erase Unit (F4h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...

  • Page 158: Figure 110. Erase Unit Information

    Word Description Control Word bit 0 : Identifier (1- Master, 0- User) bit 1 : Erase mode (1- Enhanced, 0- Normal) Enhanced mode is not supported bit 2-15: Reserved 01-16 Password ( 32 bytes ) 17-255 Reserved Figure 110. Erase Unit Information Identifier Zero indicates that the device should check the supplied password against the user password stored internally.

  • Page 159: Security Freeze Lock (F5H)

    12.23 Security Freeze Lock (F5h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...

  • Page 160: Security Set Password (F1H)

    12.24 Security Set Password (F1h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...

  • Page 161: Figure 113. Security Set Password Information

    Word Description Control Word bit 0 : Identifier (1- Master, 0- User) bit 1-7 : Reserved bit 8 : Security level (1- Maximum, 0- High) bit 9-15 : Reserved 01-16 Password ( 32 bytes ) Master Password Revision Code Valid if Word 0 bit 0 = 1 18-255 Reserved Figure 113.

  • Page 162: Security Unlock (F2H)

    12.25 Security Unlock (F2h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature Error...

  • Page 163: Figure 115. Security Unlock Information

    Word Description Control Word bit 0 : Identifier (1- Master, 0- User) bit 1-15 : Reserved 01-16 Password ( 32 bytes ) 17-255 Reserved Figure 115. Security Unlock Information Identifier Zero indicates that device regards Password as User Password. One indicates that device regards Password as Master Password.

  • Page 164: Seek (7Xh)

    12.26 Seek (7xh) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature Error - - - - - - - -...

  • Page 165: Service (A2H)

    12.27 Service (A2h) Command Block Output Registers Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Feature - - - - - - - - Sector Count - - - - - - - - Sector Number - - - - - - - - Cylinder Low...

  • Page 166: Set Features (Efh)

    12.28 Set Features (EFh) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...

  • Page 167: Set Transfer Mode

    5DH Enable release interrupt 66H Disable reverting to power on defaults 82H Disable write cache 85H Disable Advanced Power Management 86H Disable Power-up in Standby mode 89H Disable Address Offset mode AAH Enable read look-ahead feature BBH 4 bytes of ECC apply on Read Long/Write Long commands C2H Disable Automatic Acoustic Management CCH Enable reverting to power on defaults DDH Disable release interrupt...

  • Page 168: Automatic Acoustic Management

    12.28.3.1 Low Power Idle mode Additional electronics are powered off and the heads are unloaded on the ramp. However the spindle is still rotated at the full speed. 12.28.3.2 Low RPM standby mode The heads are unloaded on the ramp and the spindle is rotated at the 60-65% of the full speed. When Feature register is 85h (=Disable Advanced Power Management), the deepest Power Saving becomes normal Idle.

  • Page 169: Set Max Address (F9H)

    12.29 Set Max Address (F9h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...
  • Page 170 Output parameters to the device Option bit for selection whether nonvolatile or volatile. B = 0 is volatile condition. When B=1, MAX LBA/CYL which is set by Set Max LBA/CYL command is pre- served by POR. When B=0, MAX LBA/CYL which is set by Set Max LBA/CYL command will be lost by POR.

  • Page 171: Set Max Set Password (Feature = 01H)

    12.29.1 Set Max Set Password (Feature = 01h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...

  • Page 172: Set Max Lock (Feature = 02H)

    12.29.2 Set Max Lock (Feature = 02h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...

  • Page 173: Set Max Unlock (Feature = 03H)

    12.29.3 Set Max Unlock (Feature = 03h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature 0 0 0 0 0 0 1 1...

  • Page 174: Set Max Freeze Lock (Feature = 04H)

    12.29.4 Set Max Freeze Lock (Feature = 04h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...

  • Page 175: Set Multiple (C6H)

    12.30 Set Multiple (C6h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...

  • Page 176: Sleep (E6H/99H)

    12.31 Sleep (E6h/99h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error - - - - - - - -...

  • Page 177: Function Set (B0H)

    12.32 S.M.A.R.T. Function Set (B0h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...

  • Page 178: Smart Read Attribute Values (Subcommand D0H)

    12.32.1 SMART Read Attribute Values (Subcommand D0h) This subcommand returns the Attribute Values of the device to the host. Upon receipt of the SMART Read Attribute Values subcommand from the host the device saves any updated Attribute Values to the Attribute Data sectors and then transfers the 512 bytes of Attribute Value information to the host.

  • Page 179: Smart Read Log Sector (Subcommand D5H)

    Off-line mode: The device executes command completion before executing the specified routine. During execution of the routine the device will not set BSY nor clear DRDY. If the device is in the process of performing its routine and is interrupted by a new command from the host, the device will abort or suspend its routine and service the host within two seconds after receipt of the new command.

  • Page 180: Smart Return Status (Subcommand Dah)

    Non-self-preserved Attribute Values will no longer be monitored. The state of S.M.A.R.T. (either enabled or disabled) is preserved by the device across power cycles. Upon receipt of the SMART Disable Operations subcommand from the host the device disables S.M.A.R.T. capabilities and functions and then saves any updated Attribute Values to the Attribute Data sector.

  • Page 181: Device Attributes Data Structure

    12.32.12 Device Attributes Data Structure The following defines the 512 bytes that make up the Attribute Value information. This data structure is accessed by the host in its entirety using the SMART Read Attribute Values subcommand. All multibyte fields shown in these data structures are in byte ordering, that is, the least significant byte occupies the lowest numbered byte address location in the field.

  • Page 182: Figure 130. Individual Attribute Data Structure

    12.32.12.2 Individual Attribute Data Structure The following defines the 12 bytes that make up the information for each Attribute entry in the Device Attribute Data Structure. Description Byte Offset Attribute ID Number (01h to FFh) Status flags Attribute Value (valid values from 01h to FDh) Vendor Specific Total Bytes Figure 130.
  • Page 183 Status Flag definitions Definition Pre-failure/advisory bit An attribute value less than or equal to its corresponding attribute threshold indicates an advisory condition where the usage or age of the device has exceeded its intended design life period. An attribute value less than or equal to its corresponding attribute threshold indicates a pre-Failure condition where imminent loss of data is being predicted.

  • Page 184: Off-Line Data Collection Capability

    12.32.12.5 Total time in seconds to complete off-line data collection activity This field tells the host how many seconds the device requires to complete the off-line data collection activity. 12.32.12.6 Off-line data collection capability Definition Execute Off-line Immediate implemented bit SMART Execute Off-line Immediate subcommand is not implemented SMART Execute Off-line Immediate subcommand is implemented Enable/disable Automatic Off-line implemented bit...

  • Page 185: Device Attribute Thresholds Data Structure

    12.32.12.10 Self-test completion time These bytes are the minimum time in minutes to complete the self-test. 12.32.12.11 Data Structure Checksum The Data Structure Checksum is the two's compliment of the result of a simple 8-bit addition of the first 511 bytes in the data structure. 12.32.13 Device Attribute Thresholds Data Structure The following defines the 512 bytes that make up the Attribute Threshold information.

  • Page 186: Smart Error Log Sector

    12.32.13.3 Attribute ID numbers Attribute I D Numbers supported by the device are the same as Attribute Values Data Structures. 12.32.13.4 Attribute Threshold These values are preset at the factory and are not intended to be changeable. 12.32.13.5 Data Structure Checksum The Data Structure Checksum is the two's compliment of the result of a simple 8-bit addition of the first 511 bytes in the data structure.

  • Page 187: Figure 134. Error Log Data Structure

    12.32.14.4 Error log data structure Data format of error data structure is shown below. Description Byte Offset 1st command data structure 2nd command data structure 3rd command data structure 4th command data structure 5th command data structure Error data structure Figure 134.

  • Page 188: Figure 136. Error Data Structure

    Error data structure: Data format of error data structure is shown below. Description Byte Offset Reserved Error register Sector count register Sector number register Cylinder Low register Cylinder High register Device/Head register Status register Extended error data (vendor specific) State Life timestamp (hours) Figure 136.

  • Page 189: Self-Test Log Data Structure

    12.32.15 Self-test log data structure The following figure defines the 512 bytes that make up the Self-test log sector. All multibyte fields shown in these data structures are in byte ordering. Description Byte Offset Data structure revision Self-test number n*18h+02h Self-test execution status n*18h+03h Life time power on hours...

  • Page 190: Error Reporting

    12.32.16 Error reporting The following table shows the values returned in the Status and Error Registers when specific error con- ditions are encountered by a device. Status Error Error condition Register Register A S.M.A.R.T. FUNCTION SET command was received by the device without the required key being loaded into the Cylinder High and Cylinder Low registers.

  • Page 191: Standby (E2H/96H)

    12.33 Standby (E2h/96h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error - - - - - - - -...
  • Page 192 Output Parameters To The Drive Sector Count Time-out Parameter. If it is 0, the automatic power down sequence is disabled. If it is nonzero, the automatic power down sequence is enabled. The time-out interval is shown below: Value Time-out -------- --------------------- Timer disabled 1-240...

  • Page 193: Standby Immediate (E0H/94H)

    12.34 Standby Immediate (E0h/94h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature Error...

  • Page 194: Write Buffer (E8H)

    12.35 Write Buffer (E8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...

  • Page 195: Write Dma (Cah/Cbh)

    12.36 Write DMA (CAh/CBh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 196 The head number of the first sector to be transferred. (L=0) In LBA mode this register contains LBA bits 24 - 27. (L=1) The retry bit. If set to 1, then retries are disabled. It is ignored, when write cache is enabled.

  • Page 197: Write Dma Queued (Cch)

    12.37 Write DMA Queued (CCh) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...
  • Page 198 Input parameters from the device on bus release Sector Count bits 7 - 3 (Tag) contain the Tag of the command being bus released. bit 2 (REL) is set to one. bit 1 (I/O) is cleared to zero. bit 0 (C/D) is cleared to zero. Sector Number, Cylinder High/Low, H n/a.

  • Page 199: Write Long (32H/33H)

    12.38 Write Long (32h/33h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data Data - - - - - - - - - - - - - - - - Feature Error...
  • Page 200 Input parameters from the device Sector Count The number of requested sectors not transferred. Sector Number The sector number of the sector to be transferred. (L=0) In LBA mode this register contains current LBA bits 0 - 7. (L=1) Cylinder High/Low The cylinder number of the sector to be transferred.

  • Page 201: Write Multiple (C5H)

    12.39 Write Multiple (C5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
  • Page 202 Input Parameters From The Device Sector Count The number of requested sectors not transferred. This will be zero, unless an unrecoverable error occurs. Sector Number The sector number of the last transferred sector. (L=0) In LBA mode this register contains current 1.5 LBA bits 0 - 7. (L=1) Cylinder High/Low The cylinder number of the last transferred sector.

  • Page 203: Write Sectors (30H/31H)

    12.40 Write Sectors (30h/31h) Command Block Output Command Block Input Registers Registers Register Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature Error...
  • Page 204 Input parameters from the device Sector Count The number of requested sectors not transferred. This will be zero, unless an unrecoverable error occurs. Sector Number The sector number of the last transferred sector. (L=0) In LBA mode, this register contains current LBA bits 0 - 7. (L=1) Cylinder High/Low The cylinder number of the last transferred sector.

  • Page 205: Timings

    13.0 Timings The timing of BSY and DRQ in Status Register are shown in the figure below. Function Interval Start Stop Time-out Power On Device Busy After Status Register Power On 400 ns Power On BSY=1 Device Ready Status Register Power On 31 sec After Power On...
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  • Page 207: Appendix

    14.0 Appendix 14.1 Commands Support Coverage Following table is provided to facilitate the understanding of DTLA-3XXXXX command support coverage comparing to the ATA-5 defined command set. The column entitled ‘Implementation’ shows the capability of DTLA-3XXXXX for those commands. Command Command Implementation ATA-5 Category Code...

  • Page 208: Figure 148. Command Coverage (2 Of 2)

    Command Command Implementation ATA-5 Command Type Code Name for DTLA-3XXXXX WRITE DMA (w/ retry) Mandatory WRITE DMA (w/o retry) Obsoleted WRITE DMA QUEUED Optional CFA WRITE MULTIPLE W/O ERASE Optional – (7) GET MEDIA STATUS Optional (7) MEDIA LOCK Optional (7) MEDIA UNLOCK Optional (7) STANDBY IMMEDIATE...

  • Page 209: Set Features Command Support Coverage

    14.2 SET FEATURES Command Support Coverage The following table provides a list of Feature Registers, Feature Names, and implementation for the DTLA-3XXXXX models. The "Implementation" column indicates with a "Yes" or "No" whether or not the DTLA-3XXXXX models have the capability of executing the command in comparison to the ATA/ATAPI-5 defined command set.
  • Page 210 This page intentionally left blank.

  • Page 211: I Ndex

    Index Abbreviations used, 1 ECC On The Fly correction, 53 Acoustics, 61 Electrical interface, 23 Actuator, 7 Electromagnetic compatibility, 63 Address Offset, 94 Energy consumption efficiency, 52 Addressing of HDD registers, 40 Equipment status, 21 Advanced Power Management, 93 AT signal connector, 23 Automatic Acoustic Management, 93 Flammability, 62 Average latency, 14...
  • Page 212 Safety, 62 Sector Addressing Mode, 78 Non-data commands, 101 Security, 83 Seek Overlap, 91 SET FEATURES Command Support Operating conditions, 46 Coverage, 197 Operating mode definition, 17 Shipped format, 19 Shipping conditions, 46 Shock, 58 Signal definition, 24 Passwords, 83 Signal timings, 28 Performance characteristics, 11 Simple sequential access, 16...

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