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Sound Carrier Trap - Sanyo ACI-A Training Manual

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Q. S@Ml
switches
(AC1-A and Acl-c
chassis only)
4-1 Sound Carrier Trap Circuit
When the 4.5 MHz system is selected, the CPU outputs a "High" signal from pin 34. Q181 is
turned on and Q182 is turned off. As a result D182/Dl 84 are cut off and D181 is turned on.
The composite video signal from pin 8 of IC201 is supplied to the base of QI 83 via the
4.5 MHz trap circuit Xl 81 which removes the intercarrier sound content. From Q183 the
CVBS video signal is fed to pin 10 of IC201. When other systems are selected the compos-
ite video signal is fed through the 5.5 MHz/6 .OMHz trap Xl 82, or the 6.5 MHz trap Xl 83,
which remove the respective intercarrier sound contents. The remaining video is fed to pin
10 of IC201 via QI 83.
This switching is shown in the table below.
10
IC201
lF/Video/chrome
8
CPU
34
4.5 MHZ
Sw
Video in
.—. —. —. —. —- —- —. —- —-—-—-—-—-—-
~~
.\
C21O
1
r—
L181
I
R196
220
i
+
/'
-
Video out
~'
—.—.
Q184
R184
680
f
1
R183
10k
$
1
X184
5.5 MHZ
/
lk
2.2k
:R195
' ~
)
R188
D182
;C181
115
, R193
,120
j
M
J!
D{84
R185
680
Xl 82
5!
5.516 .OMHZ
Xl 83
6.5 MHz
4
R182
27k
4
Q182
'=I.XEE
J
SIF System
Pin 34
Q181
Q182
D181
D182
4.5 MHZ
H
On
off
On
off
Other
L
off
On
off
On
-
-22-
Training
Manual
AC I Chassis

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