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MicroHarmony Cell Sizes 40 - 260A Manual
5.5 Protection Features
The Cell Control Board (CCB) contains circuitry and firmware that protects the cell from various abnormal operating
conditions. A description of these protection functions as well as the resulting cell response and the detection
thresholds are described below:
CCB Board
Cell Protection
Ref. Signal
1
VDCHIL
Over Voltage
1
VDCLOWL
Under Voltage
Control Power
POWEROK
1
Fault
1
VCAPOK
Cap-Share Fault
OOS1L to
1
Out of Saturation
OOS4L
Cell Over
OVERTMP
2
Temperature
Q1BLK to
3
Device Failure
Q4BLK
2
VAVLOW
Input Power Low
19001467: Version 1.0
Description and Thresholds
DC voltage between Plus-Minus bus has exceeded the upper limit of its
allowable range. This is set by a solder blob (SB) jumper on the CCB.
VDCHIL is active low when Vbus exceeds:
630V: 1096 ± 30 vdc
690V: 1200 ± 30 vdc
750V: 1300 ± 30vdc
DC voltage between Plus-Minus bus has decreased below the lower limit
of its allowable range. VDCLOWL is active low when Vbus drops below
475 ± 24vdc
DC voltage between Plus-Minus bus is valid for control circuits. This does
not necessarily mean that DC power is available for driving load.
POWEROK is active high when Vbus exceeds 300 ± 30vdc
Voltage across power capacitors is all less than specified upper limit. This
is set by scaling resistors for either 400 or 450V capacitors. VCAPOK is
active high when individual capacitor voltages are less than:
400V: 430 ± 10vdc
450V: 485 ± 10vdc
Voltage between collector and emitter of an IGBT has exceeded its upper
limit due to de-saturation with gate signal applied. This implies the IGBT
may have encountered a short circuit condition. OOS1L to OOS4L are
active low.
A PTC thermistor on the heat sink is used to monitor the critical tempera-
ture between the IGBTs. Circuits on the CCB modulate the signal from this
thermistor to a PWM weighted bit, which is transmitted by the CCB on
every down packet. Refer to "Heat Sink Temperature Monitor"
section for more details. Trips at ~80°C.
If collector-emitter of IGBT fails to block minimum voltage threshold
while gate signal is not applied, then QnBLK becomes low; "n" is 1 to 4
indicating effected IGBT.
VAVLOW becomes active high when AC input voltage drops below
470 ± 40Vrms. This is the allowable minimum input voltage.
s
Cell Control Board - 10000432
5
5-5
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