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3.9 LCD Interface
3.9 LCD Interface
1
LCD_WR_N
2
LCD_RS
3
LCD_CS_N
4
7.5pF
1
LNAND_D_[07]
2
LNAND_D_[05]
3
LNAND_D_[03]
4
LNAND_D_[01]
7.5pF
1
LNAND_D_[06]
2
LNAND_D_[04]
3
LNAND_D_[02]
4
LNAND_D_[00]
7.5pF
MT6255 contains a versatile LCD controller which is optimized for multimedia applications. This controller
supports many types of LCD modules and contains a rich feature set to enhance the functionality. These
features are:
• Up to 800x480 at 18 bpp @ 200 MHz, 480x320 at 18 bpp @ 133 MHz
• Supports LCD format : RGB332, RGB444, RGB565, RGB666, RGB888 LCD modules.
• 4 Layers Overlay with individual color depth, window size, vertical and horizontal offset, source key,
alpha value and display rotation control(90°,180°, 270°, mirror and mirror then 90°, 180° and 270°)cc
• One Color Look-Up Table
• Three Gamma Correction Tables
For parallel LCD modules, the LCD controller can reuse external memory interface or use dedicated 16/18-bit
parallel interface to access them and 8080 type interface is supported. It can transfer the display data from the
internal SRAM or external SRAM/Flash Memory to the off-chip LCD modules.
For serial LCD modules, this interface performs parallel to serial conversion and both 8- and 9- bit serial interface
is supported. The 8-bit serial interface uses four pins – LSCE#, LSDA, LSCK and LSA0 – to enter commands and
data.
Meanwhile, the 9-bit serial interface uses three pins – LSCE#, LSDA and LSCK – for the same purpose. Data read
is not available with the serial interface and data entered must be 8 bit.
LGE Internal Use Only
LGE Internal Use Only
FL300
9
INOUT_A1
INOUT_B1
8
INOUT_A2
INOUT_B2
7
INOUT_A3
INOUT_B3
6
INOUT_A4
INOUT_B4
5
10
FL301
9
INOUT_A1
INOUT_B1
8
INOUT_A2
INOUT_B2
7
INOUT_A3
INOUT_B3
6
INOUT_A4
INOUT_B4
5
10
FL302
9
INOUT_A1
INOUT_B1
8
INOUT_A2
INOUT_B2
7
INOUT_A3
INOUT_B3
6
INOUT_A4
INOUT_B4
LCD_ID
5
10
TIANMA LCD ID : HIGH
Figure 3.9.1 LCD Interface
Figure 3.9.1 LCD Interface
VIO_1V8
2
R307
DNI
1
LCD_LED_CA1
LCD_LED_CA2
LCD_LED_CA3
R308
100K
IF_MODE[1:0] = 01 --> 00
D[15:0] 16 bit --> D[7:0] 8 bit mode
Changed (9/10)
IM0
LCD_VSYNC
LCD_RD_N
Added (9/10)
VA327
VA328
Changed from D[15:8] to D[7:0]
Changed (9/10)
R311
100K
VA329
Added (9/10)
- 42 -
Copyright © 2007 LG Electronics. Inc. All right reserved.
Copyright © 2013 LG Electronics. Inc. All right reserved.
43
/ 131
Only for training and service purposes
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
VBAT
C305
2.2u
35
34
Added (10/31)
33
32
VIO_1V8
31
1
2
30
R312
29
IM1
28
100K
27
26
25
24
LCD_RST_N
23
22
21
C322
20
1u
19
18
17
16
15
14
13
12
11
10
VIO_2V8
VIO_1V8
9
8
7
6
5
4
3
2
VA332
VA331
1
C308
C309
CN301
1u
1u
Added (10/30)
Only for training and service purposes
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